DS92CK16 transceiver equivalent, 3v blvds 1 to 6 clock buffer/bus transceiver.
Master/Slave clock selection in a backplane application 125 MHz operation (typical) 100 ps duty cycle distortion (typical) 50 ps channel to channel skew (typical) 3.3V po.
requiring ultra low power dissipation, low noise, and high data rates. The BLVDS side is a transceiver with a separate c.
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